The invention relates generally to integrated circuit fabrication, and more particularly to providing an ultra-thin oxide layer of uniform thickness over semiconductor structures.
Thin oxide layers are often desired over semiconductor surfaces in fabricating integrated circuits. For example, silicon oxide for conventional gate dielectrics for integrated transistors are typically grown on a single crystal silicon wafer or epitaxial silicon layer. Even for alternative gate dielectric materials, very thin silicon oxide layers are typically grown first for superior silicon/oxide interface characteristics. Similarly, silicon oxide is often grown on silicon electrodes in capacitors for memory cells, such as in dynamic random access memory (DRAM) arrays.
Prior to thermally growing silicon oxide, the silicon surface is desirably cleaned to avoid contamination and produce superior electrical properties. Among other things, the surface is generally cleaned of a naturally forming oxide known as xe2x80x9cnative oxide.xe2x80x9d
As is well known in the art, native oxide forms naturally over bare silicon surfaces even upon exposure to clean room environments at room temperature. Typically, native oxide comprises a few angstroms of silicon oxide, a substantial portion of the dielectric film to be formed. While a thermal oxide can be grown through the native oxide to complete the desired dielectric layer, the quality and thickness of the native oxide are inconsistent across the silicon surface. Moreover, the native oxide left after long transportation and/or storage is typically contaminated with impurities.
Accordingly, native oxide is typically removed from the surface with solutions such as dilute hydrofluoric acid (HF) baths or HF vapor etching. Dipping the wafers in a dilute HF bath cleans the silicon surface native oxide and leaves the surface hydrogen terminated. HF vapor etching similarly cleans the silicon surface and terminates dangling silicon bonds, but the surface termination includes a substantial fluorine content. Hydrogen termination is not very stable, particularly at elevated temperatures. The hydrogen atoms readily desorb to leave the dangling silicon bonds that tend to attract atmospheric contaminants. Even with hydrogen and fluorine termination in place, atmospheric oxidants can still diffuse through the termination layer between HF treatment and subsequent processing. Thus, HF treatment cleans the wafer surface but leaves the surface inadequately protected for the period between cleaning and further processing. The composition of this regrown oxide strongly depends on many different conditions, such as the doping levels within the silicon and concentration of moisture within the air, such that this oxide regrowth is also inconsistent and difficult to control.
One manner in which a clean silicon surface can be maintained for longer periods of time is to quickly grow a thin silicon oxide passivation layer after cleaning the silicon surface. Such a passivation layer can also be used to provide improved interface characteristics between a silicon structure and more advanced dielectric materials, such as those exhibiting high dielectric permitivity (high-k dielectrics). Spontaneous oxide regrowth, such as by room temperature exposure to typical oxidants like air or water, results in a very slow reaction, which is unacceptable for commercial fabrication. Studies show that oxide regrowth after HF treatment, sufficient to provide a thin silicon oxide passivation layer, can take on the order of 103 to 104 minutes.
As is well known, this oxidation rate can be increased by heating the wafer during oxidation. Unfortunately, thermal oxidation at temperatures greater than 500xc2x0 C. causes the hydrogen termination left by HF treatment to desorb well before temperatures reach the level at which significant oxidation takes place. In the interim, the silicon surface is left unprotected. Moreover, thermal oxidation of the initially bare silicon substrate proceeds rapidly and by mechanisms that are not well understood, as compared to latter stages during which oxidants diffuse through an already-grown portion of the silicon oxide. Accordingly, when attempting to provide oxide thicknesses appropriate for passivation and interface improvement beneath high-k materials, the oxidation is not easily controlled and can easily exceed the desired thickness.
Oxidation can be more easily controlled using room temperature wet oxidation by immersion in water. Dissolving ozone in water can improve the oxidation rate relative to water alone. Moreover, concentration of the dissolved ozone can be controlled to tailor the growth rates. Unfortunately, wet processing is not compatible with rapid sequential processing steps. Wet processing stations are typically separated from cluster tools, as moisture can be corrosive to vapor processing tools like chemical vapor deposition (CVD) reactors and vapor etching tools.
Accordingly, there is a need for improved methods for providing passivation layers over silicon surfaces. Such methods should desirably be finely controllable for tailoring passivation layer thicknesses between about 0.1 nm and 1.2 nm.
The preferred embodiments present methods of growing extremely fine oxide layers in a controllable fashion. In particular, the rapid growth of thermal oxidation is tempered by forcing such oxidation to take place through a protective layer of surface termination or ligands.
In the illustrated embodiments, termination of silicon surfaces left by HF vapor or wet etching (which cleans native oxide from a silicon surface) is replaced by oxidation-moderating or -inhibiting ligands. The ligands can comprise OH formed from exposure of the clean silicon to water (H2O). In another embodiment, the ligands comprise more effective oxidation-moderating species. For example, such oxidation-moderating termination can be formed by exposing the clean silicon to compounds capable of forming alkoxides, such as alcohols, or to carboxylic acids.
Oxidation is then conducted through the surface termination. Temperatures for this process are preferably maintained between about room temperature (25xc2x00 C.) and 400xc2x0 C. Preferably, the oxide grown through the surface termination comprises between about 0.1 nm and 1.2 nm, formed uniformly across the silicon surface. Following oxidation, the surface termination is replaced, if necessary, with OH termination, which advantageously facilitates deposition of a further dielectric layer upon the oxide. Further deposition can be by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD) or any other film deposition method known in the art. Most preferably, the further dielectric layer is characterized by a high permitivity constant (e.g., greater than about 10).
Advantageously, the methods can be implemented with two or more sequential steps conducted in situ, i.e., without removing the workpiece from a reaction chamber between steps.
An exemplary context for the invention is the formation of a uniform gate dielectric, incorporating a high k dielectric with an interfacial oxide over a semiconductor substrate, for use in a transistor gate stack.